A. A & B
B. C & D
C. A & D
D. B & C

A. 500 ohms
B. 1000 ohms
C. 1500 ohms
D. 2000 ohms

A. PLCC
B. QFP
C. PGA
D. BGA

## Which mechanism allocates the binary value to the states in order to reduce the cost of the combinational circuits ?

A. State Reduction
B. State Minimization
C. State Assignment
D. State Evaluation

## When an input signal 1 is applied to a NOT gate, the output is ______________?

A. 0
B. 1
C. Either 0 & 1
D. None of the above

## Which is the correct order of sequence for representing the input values in K-map ?

A. (00, 01, 10, 11)
B. (00, 10, 01, 11)
C. (00, 01, 11, 10)
D. (00, 10, 11, 01)

## The NOR gate is OR gate followed by____________________?

A. AND gate
B. NAND gate
C. NOT gate
D. None of the above

## The NAND gate is AND gate followed by_________________?

A. NOT gate
B. OR gate
C. AND gate
D. None of the above

## Most of the digital computers do not have floating point hardware because_____________?

A. floating point hardware is costly
B. it is slower than software
C. it is not possible to perform floating point addition by hardware
D. of no specific reason.

A. Base 10
B. Base 16
C. Base8
D. Base 3

## Indicate which of the following three binary additions are correct? 1.1011 + 1010 = 10101 II. 1010 + 1101 = 10111 ?

III. 1010 + 1101 = 11111
A. I and II
B. II and III
C. III only
D. II and III

## In Boolean algebra, the bar sign (-) indicates__________________?

A. OR operation
B. AND operation
C. NOT operation
D. None of the above

## In case of OR gate, no matter what the number of inputs, a____________________?

A. 1 at any input causes the output to be at logic 1
B. 1 at any input causes the output to be at logic 0
C. 0 any input causes the output to be at logic 0
D. 0 at any input causes the output to be at logic 1

## NAND gates are preferred over others because these__________________?

A. have lower fabrication area
B. can be used to make any gate
C. consume least electronic power
D. provide maximum density in a chip

## Positive logic in a logic circuit is one in which______________?

A. logic 0 and 1 are represented by 0 and positive voltage respectively
B. logic 0 and, -1 are represented by negative and positive voltages respectively
C. logic 0 voltage level is higher than logic 1 voltage level
D. logic 0 voltage level is lower than logic 1 voltage level

## The inverter is _________________?

A. NOT gate
B. OR gate
C. AND gate
D.None of the above

## The inputs of a NAND gate are connected together. The resulting circuit is _______________?

A. OR gate
B. AND gate
C. NOT gate
D. None of the above

A. 2TTL
B. 5TTL
C. 8TTL
D. 10TTL

A. 10101.001
B. 10100.001
C. 10101.010
D. 10100.111

A. 0.87
B. 8.50
C. 7.50
D. 5.80